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PIC18C601/801
DS39541A-page 312
Advance Information
2001 Microchip Technology Inc.
Program Counter
PCL Register ............................................................. 46
PCLATH Register ...................................................... 46
Program Memory ............................................................... 39
Boot Loader ............................................................... 43
Memory Map, PIC18C601
Program Bit Not Set ........................................... 40
Program Bit Set ................................................. 41
Memory Map, PIC18C801
Program Bit Not Set ........................................... 40
Program Bit Set ................................................. 42
Program Memory Map
PIC18C601 ................................................................ 40
Program Bit Set ................................................. 41
PIC18C801 ................................................................ 40
Program Bit Set ................................................. 42
Programming, Device Instructions ................................... 215
PUSH ............................................................................... 244
PWM (CCP Module) ........................................................ 146
Block Diagram ......................................................... 146
CCPR1H:CCPR1L Registers ................................... 146
Duty Cycle ............................................................... 146
Example Frequencies/Resolutions .......................... 147
Output Diagram ....................................................... 146
Period ...................................................................... 146
Registers Associated with PWM .............................. 147
Setup for PWM Operation ........................................ 147
TMR2 to PR2 Match ....................................... 135
, 146
Q
Q Clock ............................................................................ 146
R
RAM. See Data Memory
RCALL ............................................................................. 245
RCSTA Register
SPEN Bit .................................................................. 177
Reader Response ............................................................ 316
Register File ....................................................................... 49
Register File Summary ...................................................... 54
Registers
ADCON0 (A/D Control 0) .......................................... 193
ADCON1 (A/D Control 1) ......................................... 194
CCP1CON and CCP2CON (CCP Control) .............. 141
CONFIG1H (Configuration Register 1 High) ............ 208
CONFIG2H (Configuration Register 2 High) ............ 209
CONFIG2L (Configuration Register 2 Low) ............. 208
CONFIG4L (Configuration Register 4 Low) ............. 209
CSEL2 (Chip Select 2) ............................................... 70
CSELIO (Chip Select I/O) .......................................... 70
INTCON (Interrupt Control) ........................................ 91
INTCON2 (Interrupt Control 2) ................................... 92
INTCON3 (Interrupt Control 3) ................................... 93
IPR (Interrupt Priority) ................................................ 99
LVDCON (LVD Control) ........................................... 204
MEMCON (Memory Control) ..................................... 63
OSCCON (Oscillator Control) .................................... 25
PIE (Peripheral Interrupt Enable) ............................... 97
PIR (Peripheral Interrupt Request) ............................ 95
PSPCON (PSP Control) ............................................ 50
RCON (Register Control) ........................................... 94
RCON (RESET Control) ..................................... 31
, 62
RCSTA (Receive Status and Control) ..................... 178
SSPCON1 (SSP Control 1) ..................................... 151
SSPCON2 (SSP Control 2) ...................................... 152
SSPSTAT (SSP Status) .......................................... 150
STATUS .................................................................... 61
STKPTR (Stack Pointer) ........................................... 44
T0CON (Timer0 Control) ......................................... 127
T1CON (Timer1 Control) ......................................... 130
T2CON (Timer2 Control) ......................................... 135
T3CON (Timer3 Control) ......................................... 137
TXSTA (Transmit Status and Control) ..................... 177
WDTCON (Watchdog Timer Control) ...................... 210
RESET ............................................................. 29
, 207, 245
Timing Diagram ....................................................... 280
RETFIE ............................................................................ 246
RETLW ............................................................................ 246
RETURN ......................................................................... 247
Revision History .............................................................. 303
RH3:RH0 Pins (I/O Mode) ............................................... 121
RH3:RH0 Pins (System Bus Mode) ................................ 122
RH7:RH4 Pins ................................................................. 121
RLCF ............................................................................... 247
RLNCF ............................................................................ 248
RRCF .............................................................................. 248
RRNCF ............................................................................ 249
S
Sales and Support ........................................................... 317
SCI. See USART
SCK ................................................................................. 153
SDI .................................................................................. 153
SDO ................................................................................. 153
Serial Clock, SCK ............................................................ 153
Serial Communication Interface. See USART
Serial Data In, SDI ........................................................... 153
Serial Data Out, SDO ...................................................... 153
Serial Peripheral Interface. See SPI
SETF ............................................................................... 249
Slave Select Synchronization .......................................... 156
Slave Select, SS .............................................................. 153
SLEEP ............................................................ 207
, 212, 250
Software Simulator (MPLAB SIM) ................................... 260
Special Event Trigger. See Compare
Special Features of the CPU ........................................... 207
Special Function Register Map ......................................... 53
Special Function Registers ................................................ 49
SPI
Associated Registers ............................................... 158
Master Mode ........................................................... 155
Serial Clock ............................................................. 153
Serial Data In ........................................................... 153
Serial Data Out ........................................................ 153
Slave Select ............................................................ 153
SPI Clock ................................................................. 155
SPI Mode ................................................................. 153
SPI Module
Slave Mode ............................................................. 156
Slave Select Synchronization .................................. 156
Slave Synch Timing ................................................. 156
Slave Timing with CKE = 0 ...................................... 157
Slave Timing with CKE = 1 ...................................... 157
SS .................................................................................... 153
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